(1) Field of the Invention
The present invention relates in general to automated manufacturing of integrated circuit semiconductor devices, and more particularly to a system where each wafer is handled as a single unit, as contrasted to the more conventional batch processing. This single unit handling method and system can result in faster cycle time, better prevention of particulate contamination and easier mechanisms.
(2) Description of the Prior Art
In the manufacture of semiconductor devices, a circular monocrystalline semiconductor wafer, most typically of monocrystalline silicon, is subjected to a large number of processes steps. These process steps include oxidation of the surface to form silicon dioxide insulating layers, deposition of polycrystalline silicon and/or metallic layers, diffusion and/or ion implantation of dopants into selected areas, lithography/masking/etching operations, etching of the various layers mentioned above, heat treating and other steps that are well known to those skilled in the art. A multitude of extremely small and complex electrical circuits are thus formed on the semiconductor wafer through these process steps. As the technology has progressed, the wafers have been made larger and the feature size of the elements of the circuitry on the wafer's surface have been greatly decreased. This progress has also lead to increasingly faster circuits manufacturable on the wafer.
As the size of the circuitry has decreased, airborne contamination becomes responsible for a serious yield problem. Since the integrated circuitry formed upon the silicon wafer is extremely small with feature size in the order of near micrometer or even submicrometer, it only takes a very small sized particle to either short circuit or cause an open in the formed circuitry. Also, such a particle can block processing chemicals from reaching every portion of the circuitry on the wafer during critical processing steps. Some contamination particles can cause incomplete etching in spaces between lines, thus leading to an unwanted electrical bridge. In addition to such physical defects, other contamination particles may cause electrical failure due to induced ionization or trapping centers in gate dielectrics or the like.
The main sources of particulate contamination are manufacturing line workers, equipment, and chemicals. Particles given off by workers in the area are transmitted through the environment, and through physical contact or migration onto the wafer surfaces. People, by shedding of skin flakes, for example are a significant source of particles that are easily ionized and cause defects. It has been found that as many as 6000 particles per minute are emitted into and adjacent cubic foot of space by a fully suited operator.
An early effort to overcome the contamination problem was to process semiconductor devices in clean rooms with HEPA or ULPA recirculating air systems with suited operators. This procedure is, however quite expensive and not always effective particularly in the era of submicrometer feature size that we are now entering. Although clean room garments reduce particle emissions they do not fully contain the emissions. Also, it is inconvenient and uncomfortable to the operators to remain fully suited at their work throughout the entire work shift.
Movement of semiconductor wafers through the fabrication system for integrated semiconductor devices have long used a cassette system to handle wafers. The wafers are carried in cassettes from processing machine to processing machine. There are many wafers in each cassette. Typical wafer cassettes are manufactured and sold by Fluoroware, Inc. of North Chaska, Minn. USA.
The disadvantages of the cassette system are that the wafers are batch processed, since the cassette is designed to hold many wafers. The cycle time for each wafers then becomes long. This adds to the cost, since a greater inventory is tied up for a longer time. Also, the response time to meet varying customer requirements is long. In addition, the friction between the wafer and the cassette can create particles when the wafers are loaded and unloaded. This contamination occurs in the clean environment and remains there. Still further, the batch transportation of wafers in a cassette or carrier opens the entire batch of wafers to damage from shock loads.
A more recent innovation in cassette systems useful in reducing the effects of contamination is the Standard Mechanical Interface (SMIF) system which is based on the realization that a small volume of still particulate-free air, with no internal source of particles is the cleanest possible environment for silicon wafer processing. A SMIF has been proposed by the Hewlett-Packard Company and is described in U.S. Pat. Nos. 4,532,970 and 4,534,389. The SMIF system consists of two parts, that is (1) a controlled environment including a clean process environment canopy surrounding a wafer-handling mechanism of each processing machine, and (2) a small clean box having a quiet internal environment for carrying a number of wafers from processing machine to another processing machine. Basically, the clean environment is maintained in the process station and in the box or cassette for carrying wafers. The wafers, contained in the cassette are introduced into the clean environment surrounding the machine through an air lock, processed in the processing machine, placed back in the cassette, and withdrawn through another air lock. The wafers are then moved to another processing machine for the next process by the same procedure.
The problems inherent in the SMIF system is first those that were described about for the cassette system, since SMIF is inferentially a cassette system. The further problems involve the mechanization difficulties in moving the wafers from the SMIF cassette pod to the processing machines.
The U.S. Pat. No. 4,540,326 discloses a system for transporting wafers between processing stations through a tunnel where a clean environment is maintained. However, the wafers are loaded and unloaded into a cassette mounted on a cart. The system, however is a batch operation with the aforedescribed disadvantages. Further, the system is inflexible, that is not capable of simultaneously processing wafers requiring different types of processing. Complete fabrication of single wafer transfer using prior art will be very rigid and loses all flexibility.
The U.S. Pat. No. 3,845,286 describes a wafer processing system wherein single wafers are transported to various processing stations with a transport mechanism. While the concept of individual wafer processing is disclosed, the problems concerning contamination are not addressed. These problems would be substantial in the environment described in this processing system.
The U.S. Pat. No. 4,027,246 also discloses a wafer processing system where semiconductor wafers are individually transported between processing stations. The wafers are transported between processing stations by use of an air track, which in modern manufacturing technology would be unacceptable, because of a lack of adequate contamination prevention control.